Cis4930 Final Report: Survey of Technology Mapping Algorithms for Lut-based Fgpa

Technology mapping is the one of tasks performed by CAD systems to implement a logic circuit by FPGA's. It transforms a pre-optimized boolean network into a network of building blocks of the target FPGA by taking the physical restriction (e. g. number of inputs) into consideration. This report summarizes the chapter 3 of [1] which is a comprehensive and exhaustive reference of technology mapping algorithm written by the developers of chortle-crf, and also introduces few more algorithms developed after [1]. As we have learned there are di erent programming technologies, such as multiplexer-based, anti-fuse, however this report concentrates on the technology mapping algorithm for Look-Up Table (LUT)-based FPGA's.